The invention relates to a field effect transistor with a layer sequence of a semi-insulating substrate, of an epitactically grown undoped gallium-aluminum-arsenide or gallium-arsenide buffer layer and of a channel layer, of a well-conducting doped gallium-arsenide, on which for the source electrode and drain electrode there are applied in lateral spacing from one another metallically coated gallium-arsenide cover layer strips, between which as gate electrode there is present a metal strip applied directly to the channel layer.
Further, the invention relates to a process for producing a field effect transistor, in which to a gallium-arsenide plate serving as substrate, there is applied a buffer layer of gallium-arsenide or gallium-aluminum-arsenide and thereupon epitactically a conducting channel layer of gallium-arsenide doped with silicon, before, for the source- and drain electrodes- there is generated a cover layer of a well-conducting, doped gallium-arsenide with a structured metal vaporizing-on, in which system the cover layer is etched off between the source electrode and the drain electrode up to the channel layer before the applying of the gate electrode.
Such a gallium-arsenide heterojunction field effect transistor as well as such a process for its production are known, in which the vaporizing-on of nickel, gold and germanium for the source-drain contacts is followed by an alloying step, in which there are used temperatures of about 400.degree. C. This treatment occurs in a furnace and leads to the result that the metal layer is embedded into the gallium-arsenide. In the process the metal layer melts up, so that the electrode is spread laterally and an uneven formation of the electrode edges occurs. Thereby the lateral spacing varies between the source contact and the drain contact along the parallel-running contact path.
The field strength in the current-transversed field effect transistor has its greatest value in the place of the least contact spacing. The flow lines between the contacts are concentrated upon this place, whereby the contact is severely burdened thermally there and is easily destroyed. A further disadvantage lies in that the alloying-in of the metal layer does not occur uniformly everywhere in the electrode surface. Thereby the contact resistance varies locally. The current flux is concentrated on the zones of the least contact resistance, whereby the contact can easily be thermally overloaded. Through the fluctuations of the contact resistance in the electrode surface, the mean contact resistance is greater than would be possible with a homogeneous, but difficult-to-achieve alloying-in. Through the greater contact resistance there is caused a stronger noise of the field effect transistor.
It has already been attempted to avoid the alloying-in operation by the means that the gallium-arsenide cover layer is extremely highly doped with silicon, as is described in ELECTRONICS LETTERS, volume 22, No. 10, pages 510 to 512 in the article "First Successful Fabrications of High-Performance All-Refractory-Metal (Ta-Au) GaAs FET Using Very Highly Doped N+ Layers and Nonalloyed Ohmic Contacts". In the known process, however, because of the high silicon doping oval defects develop in the gallium-arsenide cover layer.
Kirchner et al described in the article "Low-Resistance Nonalloyed Ohmic Contacts to Si-Doped Molecular Beam Epitaxial GaAs". Appl. Phys. Lett. 47 (1), July 1, 1985, pages 26 to 28, that the electron concentration the gallium-arsenide, as a consequence of a high doping with silicon, reaches a maximal concentration which limits the attainable contact resistance.